1. Field of the Invention
Embodiments of the present invention generally relate to plasma processing chambers used in the semiconductor industry to manufacture integrated circuits and, more specifically, to methods and apparatuses for preventing arcing or undesired plasma glows in plasma processing chambers.
2. Description of the Related Art
In the manufacture of integrated circuits (ICs), many processing steps are performed using plasma chambers, such as plasma etch chambers, plasma enhanced chemical vapor deposition (PECVD) chambers, reactive ion etch (RIE) chambers, electron cyclotron resonance (ECR) chambers, and the like. Plasma-induced arcing in such chambers is a phenomenon that detrimentally affects yield and, specifically, causes particle contamination and uniformity of the fabricated features and devices of the ICs.
One particular region vulnerable to plasma-induced arcing or plasma glows is the region adjacent to slit valve doors utilized to seal substrate transfer ports. In particular, plasma arcing is often observed in proximity to substrate transfer ports and, specifically, at doors used for sealing such ports during plasma processing of substrates in the respective chambers. Generally, severity of plasma arcing in these regions increases with excitation frequency of the plasma.
Unless the plasma is surrounded by surfaces representing a short circuit at excitation frequency of the plasma, arcing may occur between the plasma and those inner surfaces of a processing chamber. While many components of the processing chamber can be sufficiently well grounded using, for example, multi-point grounding techniques, preventing plasma formation at or near the slit valve door has remained a challenge.
Therefore, there is a need for improvements in the prevention of undesired plasma formation at chamber ports.